Hello,
I get a "Segmentation fault" error when I run a sample calculation interactively on the cluster masternode.
I get the same error:
= BAD TERMINATION OF ONE OF YOUR APPLICATION PROCESSES
= PID 231279 RUNNING AT n023.zeus.technion.ac.il
= EXIT CODE: 11
when I submit this calculation to the cluster with a PBS script.
Below is the output of lspci, and file makefile.include which was used for the compilation.
As was suggested in a previous case, I replaced -xHOST with -march=core-avx2.
Thank you for your help. Amihai
$ lspci
00:00.0 Host bridge: Intel Corporation Sky Lake-E DMI3 Registers (rev 04)
00:04.0 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
00:04.1 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
00:04.2 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
00:04.3 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
00:04.4 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
00:04.5 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
00:04.6 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
00:04.7 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
00:05.0 System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers (rev 04)
00:05.2 System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)
00:05.4 PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)
00:08.0 System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)
00:08.1 Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)
00:08.2 System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)
00:11.0 Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM 0 (rev 09)
00:11.1 Unassigned class [ff00]: Intel Corporation C620 Series Chipset Family MROM 1 (rev 09)
00:14.0 USB controller: Intel Corporation C620 Series Chipset Family USB 3.0 xHCI Controller (rev 09)
00:14.2 Signal processing controller: Intel Corporation C620 Series Chipset Family Thermal Subsystem (rev 09)
00:16.0 Communication controller: Intel Corporation C620 Series Chipset Family MEI Controller #1 (rev 09)
00:16.4 Communication controller: Intel Corporation C620 Series Chipset Family MEI Controller #3 (rev 09)
00:1c.0 PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root Port #1 (rev f9)
00:1c.4 PCI bridge: Intel Corporation C620 Series Chipset Family PCI Express Root Port #5 (rev f9)
00:1f.0 ISA bridge: Intel Corporation C621 Series Chipset LPC/eSPI Controller (rev 09)
00:1f.2 Memory controller: Intel Corporation C620 Series Chipset Family Power Management Controller (rev 09)
01:00.0 System peripheral: Hewlett-Packard Company Integrated Lights-Out Standard Slave Instrumentation & System Support (rev 07)
01:00.1 VGA compatible controller: Matrox Electronics Systems Ltd. MGA G200eH3 (rev 02)
01:00.2 System peripheral: Hewlett-Packard Company Integrated Lights-Out Standard Management Processor Support and Messaging (rev 07)
01:00.4 USB controller: Hewlett-Packard Company iLO5 Virtual USB Controller
02:00.0 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM5719 Gigabit Ethernet PCIe (rev 01)
02:00.1 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM5719 Gigabit Ethernet PCIe (rev 01)
02:00.2 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM5719 Gigabit Ethernet PCIe (rev 01)
02:00.3 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme BCM5719 Gigabit Ethernet PCIe (rev 01)
11:00.0 PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)
11:05.0 System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)
11:05.2 System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers (rev 04)
11:05.4 PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)
11:08.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:08.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:08.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:08.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:08.4 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:08.5 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:08.6 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:08.7 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:09.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:09.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:09.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:09.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:09.4 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:09.5 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:09.6 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:09.7 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0a.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0a.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0e.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0e.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0e.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0e.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0e.4 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0e.5 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0e.6 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0e.7 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0f.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0f.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0f.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0f.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0f.4 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0f.5 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0f.6 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:0f.7 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:10.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:10.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:1d.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:1d.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:1d.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:1d.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
11:1e.0 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
11:1e.1 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
11:1e.2 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
11:1e.3 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
11:1e.4 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
11:1e.5 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
11:1e.6 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
12:00.0 Infiniband controller: Mellanox Technologies MT27700 Family [ConnectX-4]
36:00.0 PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)
36:02.0 PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)
36:05.0 System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)
36:05.2 System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers (rev 04)
36:05.4 PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)
36:08.0 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:09.0 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0a.0 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0a.1 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0a.2 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0a.3 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0a.4 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0a.5 System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)
36:0a.6 System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)
36:0a.7 System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)
36:0b.0 System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)
36:0b.1 System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)
36:0b.2 System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)
36:0b.3 System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)
36:0c.0 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0c.1 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0c.2 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0c.3 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0c.4 System peripheral: Intel Corporation Sky Lake-E Integrated Memory Controller (rev 04)
36:0c.5 System peripheral: Intel Corporation Sky Lake-E LM Channel 1 (rev 04)
36:0c.6 System peripheral: Intel Corporation Sky Lake-E LMS Channel 1 (rev 04)
36:0c.7 System peripheral: Intel Corporation Sky Lake-E LMDP Channel 1 (rev 04)
36:0d.0 System peripheral: Intel Corporation Sky Lake-E DECS Channel 2 (rev 04)
36:0d.1 System peripheral: Intel Corporation Sky Lake-E LM Channel 2 (rev 04)
36:0d.2 System peripheral: Intel Corporation Sky Lake-E LMS Channel 2 (rev 04)
36:0d.3 System peripheral: Intel Corporation Sky Lake-E LMDP Channel 2 (rev 04)
5b:00.0 PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)
5b:02.0 PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port C (rev 04)
5b:05.0 System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)
5b:05.2 System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers (rev 04)
5b:05.4 PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)
5b:0e.0 Performance counters: Intel Corporation Sky Lake-E KTI 0 (rev 04)
5b:0e.1 System peripheral: Intel Corporation Sky Lake-E UPI Registers (rev 04)
5b:0f.0 Performance counters: Intel Corporation Sky Lake-E KTI 0 (rev 04)
5b:0f.1 System peripheral: Intel Corporation Sky Lake-E UPI Registers (rev 04)
5b:12.0 Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)
5b:12.1 Performance counters: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)
5b:12.2 System peripheral: Intel Corporation Sky Lake-E M3KTI Registers (rev 04)
5b:15.0 System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)
5b:16.0 System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)
5b:16.4 System peripheral: Intel Corporation Sky Lake-E M2PCI Registers (rev 04)
5c:00.0 Serial Attached SCSI controller: Adaptec Smart Storage PQI 12G SAS/PCIe 3 (rev 01)
5d:00.0 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme II BCM57810 10 Gigabit Ethernet (rev 10)
5d:00.1 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme II BCM57810 10 Gigabit Ethernet (rev 10)
80:04.0 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
80:04.1 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
80:04.2 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
80:04.3 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
80:04.4 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
80:04.5 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
80:04.6 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
80:04.7 System peripheral: Intel Corporation Sky Lake-E CBDMA Registers (rev 04)
80:05.0 System peripheral: Intel Corporation Sky Lake-E MM/Vt-d Configuration Registers (rev 04)
80:05.2 System peripheral: Intel Corporation Sky Lake-E RAS (rev 04)
80:05.4 PIC: Intel Corporation Sky Lake-E IOAPIC (rev 04)
80:08.0 System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)
80:08.1 Performance counters: Intel Corporation Sky Lake-E Ubox Registers (rev 04)
80:08.2 System peripheral: Intel Corporation Sky Lake-E Ubox Registers (rev 04)
85:00.0 PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)
85:05.0 System peripheral: Intel Corporation Sky Lake-E VT-d (rev 04)
85:05.2 System peripheral: Intel Corporation Sky Lake-E RAS Configuration Registers (rev 04)
85:05.4 PIC: Intel Corporation Sky Lake-E IOxAPIC Configuration Registers (rev 04)
85:08.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:08.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:08.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:08.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:08.4 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:08.5 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:08.6 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:08.7 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:09.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:09.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:09.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:09.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:09.4 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:09.5 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:09.6 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:09.7 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0a.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0a.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0e.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0e.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0e.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0e.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0e.4 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0e.5 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0e.6 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0e.7 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0f.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0f.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0f.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0f.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0f.4 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0f.5 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0f.6 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:0f.7 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:10.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:10.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:1d.0 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:1d.1 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:1d.2 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:1d.3 System peripheral: Intel Corporation Sky Lake-E CHA Registers (rev 04)
85:1e.0 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
85:1e.1 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
85:1e.2 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
85:1e.3 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
85:1e.4 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
85:1e.5 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
85:1e.6 System peripheral: Intel Corporation Sky Lake-E PCU Registers (rev 04)
ae:00.0 PCI bridge: Intel Corporation Sky Lake-E PCI Express Root Port A (rev 04)
# cat makefile.include
# Default precompiler options
CPP_OPTIONS = -DHOST=\"LinuxIFC\" \
-DMPI -DMPI_BLOCK=8000 -Duse_collective \
-DscaLAPACK \
-DCACHE_SIZE=4000 \
-Davoidalloc \
-Dvasp6 \
-Duse_bse_te \
-Dtbdyn \
-Dfock_dblbuf \
-D_OPENMP
CPP = fpp -f_com=no -free -w0 $*$(FUFFIX) $*$(SUFFIX) $(CPP_OPTIONS)
FC = mpiifort -qopenmp
FCL = mpiifort
FREE = -free -names lowercase
FFLAGS = -assume byterecl -w
OFLAG = -O2
OFLAG_IN = $(OFLAG)
DEBUG = -O0
OBJECTS = fftmpiw.o fftmpi_map.o fftw3d.o fft3dlib.o
OBJECTS_O1 += fftw3d.o fftmpi.o fftmpiw.o
OBJECTS_O2 += fft3dlib.o
# For what used to be vasp.5.lib
CPP_LIB = $(CPP)
FC_LIB = $(FC)
CC_LIB = icc
CFLAGS_LIB = -O
FFLAGS_LIB = -O1
FREE_LIB = $(FREE)
OBJECTS_LIB = linpack_double.o
# For the parser library
CXX_PARS = icpc
LLIBS = -lstdc++
##
## Customize as of this point! Of course you may change the preceding
## part of this file as well if you like, but it should rarely be
## necessary ...
##
# When compiling on the target machine itself, change this to the
# relevant target when cross-compiling for another architecture
###VASP_TARGET_CPU ?= -xHOST
VASP_TARGET_CPU ?= -march=core-avx2
FFLAGS += $(VASP_TARGET_CPU)
# Intel MKL (FFTW, BLAS, LAPACK, and scaLAPACK)
# (Note: for Intel Parallel Studio's MKL use -mkl instead of -qmkl)
FCL += -qmkl
MKLROOT = /usr/local/intel_oneapi2022/mkl/2022.0.2
LLIBS += -L$(MKLROOT)/lib/intel64 -lmkl_scalapack_lp64 -lmkl_blacs_intelmpi_lp64
INCS =-I$(MKLROOT)/include/fftw
# HDF5-support (optional but strongly recommended)
#CPP_OPTIONS+= -DVASP_HDF5
#HDF5_ROOT ?= /path/to/your/hdf5/installation
#LLIBS += -L$(HDF5_ROOT)/lib -lhdf5_fortran
#INCS += -I$(HDF5_ROOT)/include
# For the VASP-2-Wannier90 interface (optional)
#CPP_OPTIONS += -DVASP2WANNIER90
#WANNIER90_ROOT ?= /path/to/your/wannier90/installation
#LLIBS += -L$(WANNIER90_ROOT)/lib -lwannier
# For the fftlib library (hardly any benefit in combination with MKL's FFTs)
#FCL = mpiifort fftlib.o -qmkl
#CXX_FFTLIB = icpc -qopenmp -std=c++11 -DFFTLIB_USE_MKL -DFFTLIB_THREADSAFE
#INCS_FFTLIB = -I./include -I$(MKLROOT)/include/fftw
#LIBS += fftlib
"Segmentation fault" error while running a calculation with vasp.6.4.1 which was compiled with intel OneApi 2022
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Re: "Segmentation fault" error while running a calculation with vasp.6.4.1 which was compiled with intel OneApi 2022
Can you tell me which exact version of OneAPI you are using? Also, does this segmentation fault happen with any VASP calculation of do you need a specific setup to reproduce it? If the setup is important, please share the required input files, so that I can reproduce it.
Martin Schlipf
VASP developer
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Re: "Segmentation fault" error while running a calculation with vasp.6.4.1 which was compiled with intel OneApi 2022
Hi,
The OneAPI version is 2021.5.0 20211109
Below is the INCAR file.
I may pack and send you all the input files, if you give me a link to a location to upload it.
Here is the full error message of this run :
]$ cat Pd.e465875
forrtl: severe (174): SIGSEGV, segmentation fault occurred
Image PC Routine Line Source
vasp_std 0000000001EE175A Unknown Unknown Unknown
libpthread-2.17.s 00002B9E468CF5F0 Unknown Unknown Unknown
vasp_std 0000000000E04B58 Unknown Unknown Unknown
vasp_std 0000000000DFE337 Unknown Unknown Unknown
libiomp5.so 00002B9E446BFC53 __kmp_invoke_micr Unknown Unknown
libiomp5.so 00002B9E4468F357 Unknown Unknown Unknown
libiomp5.so 00002B9E4468E9D5 Unknown Unknown Unknown
libiomp5.so 00002B9E446C0133 Unknown Unknown Unknown
libpthread-2.17.s 00002B9E468C7E65 Unknown Unknown Unknown
libc-2.17.so 00002B9E46EDC88D clone Unknown Unknown
]$ find /usr/local/intel_oneapi2022/ -name libiomp5.so
/usr/local/intel_oneapi2022/compiler/2022.0.2/linux/compiler/lib/ia32_lin/libiomp5.so
/usr/local/intel_oneapi2022/compiler/2022.0.2/linux/compiler/lib/intel64_lin/libiomp5.so
/usr/local/intel_oneapi2022/inspector/2022.0.0/lib32/libiomp5.so
/usr/local/intel_oneapi2022/inspector/2022.0.0/lib64/libiomp5.so
/usr/local/intel_oneapi2022/clck/2021.5.0/provider/share/common/lib/intel64/libiomp5.so
]$ cat INCAR
SYSTEM = Li2O2 GAS PHASE MOLECULE
Electronic relaxation:
ENCUT = 500.0 ! Cutoff energy for plane waves basis set in eV (determines NGX,Y,Z).
ALGO = Normal !
NELMIN = 6 ! Minimum number of eletronic selfconsistency (SC) steps
NELM = 60 ! Maximum number of electronic SC steps
NELMDL = -12 ! Number of NON-selfconsistency steps
EDIFF = 1.0E-6 ! Global-break condition for the electronic SC-loop (ELM)
AMIX = 0.01000
BMIX = 0.000100
Calculation mode:
PREC = Normal ! Calcululation level (Changes FFT-grids)
ISPIN = 2 ! non-spin-polarized calculations
ADDGRID = .TRUE. ! PAW flag
LASPH = .TRUE. ! non-spherical elements in the PAW method
LREAL = AUTO
IDIPOL = 3
Ionic relaxation:
NSW = 500 ! Number of ionic steps
EDIFFG = -0.0200 ! stop if all forces are smaller than |EDIFFG|
IBRION = 2 !
ISIF = 0 ! Calculate FORCE and Relaxa Ions
POTIM = 0.50
ISTART = 0
ICHARG = 2
Integration over the Brillouin zone (BZ):
ISMEAR = 2 ! Fermi smearing
SIGMA = 0.2
OUTCAR size:
NWRITE = 1 ! Determines how much information will be written in OUTCAR
LWAVE = .FALSE.
LCHARG = .FALSE.
Key for parallel mode calculation:
NPAR = 1
LPLANE = .TRUE.
The OneAPI version is 2021.5.0 20211109
Below is the INCAR file.
I may pack and send you all the input files, if you give me a link to a location to upload it.
Here is the full error message of this run :
]$ cat Pd.e465875
forrtl: severe (174): SIGSEGV, segmentation fault occurred
Image PC Routine Line Source
vasp_std 0000000001EE175A Unknown Unknown Unknown
libpthread-2.17.s 00002B9E468CF5F0 Unknown Unknown Unknown
vasp_std 0000000000E04B58 Unknown Unknown Unknown
vasp_std 0000000000DFE337 Unknown Unknown Unknown
libiomp5.so 00002B9E446BFC53 __kmp_invoke_micr Unknown Unknown
libiomp5.so 00002B9E4468F357 Unknown Unknown Unknown
libiomp5.so 00002B9E4468E9D5 Unknown Unknown Unknown
libiomp5.so 00002B9E446C0133 Unknown Unknown Unknown
libpthread-2.17.s 00002B9E468C7E65 Unknown Unknown Unknown
libc-2.17.so 00002B9E46EDC88D clone Unknown Unknown
]$ find /usr/local/intel_oneapi2022/ -name libiomp5.so
/usr/local/intel_oneapi2022/compiler/2022.0.2/linux/compiler/lib/ia32_lin/libiomp5.so
/usr/local/intel_oneapi2022/compiler/2022.0.2/linux/compiler/lib/intel64_lin/libiomp5.so
/usr/local/intel_oneapi2022/inspector/2022.0.0/lib32/libiomp5.so
/usr/local/intel_oneapi2022/inspector/2022.0.0/lib64/libiomp5.so
/usr/local/intel_oneapi2022/clck/2021.5.0/provider/share/common/lib/intel64/libiomp5.so
]$ cat INCAR
SYSTEM = Li2O2 GAS PHASE MOLECULE
Electronic relaxation:
ENCUT = 500.0 ! Cutoff energy for plane waves basis set in eV (determines NGX,Y,Z).
ALGO = Normal !
NELMIN = 6 ! Minimum number of eletronic selfconsistency (SC) steps
NELM = 60 ! Maximum number of electronic SC steps
NELMDL = -12 ! Number of NON-selfconsistency steps
EDIFF = 1.0E-6 ! Global-break condition for the electronic SC-loop (ELM)
AMIX = 0.01000
BMIX = 0.000100
Calculation mode:
PREC = Normal ! Calcululation level (Changes FFT-grids)
ISPIN = 2 ! non-spin-polarized calculations
ADDGRID = .TRUE. ! PAW flag
LASPH = .TRUE. ! non-spherical elements in the PAW method
LREAL = AUTO
IDIPOL = 3
Ionic relaxation:
NSW = 500 ! Number of ionic steps
EDIFFG = -0.0200 ! stop if all forces are smaller than |EDIFFG|
IBRION = 2 !
ISIF = 0 ! Calculate FORCE and Relaxa Ions
POTIM = 0.50
ISTART = 0
ICHARG = 2
Integration over the Brillouin zone (BZ):
ISMEAR = 2 ! Fermi smearing
SIGMA = 0.2
OUTCAR size:
NWRITE = 1 ! Determines how much information will be written in OUTCAR
LWAVE = .FALSE.
LCHARG = .FALSE.
Key for parallel mode calculation:
NPAR = 1
LPLANE = .TRUE.
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Re: "Segmentation fault" error while running a calculation with vasp.6.4.1 which was compiled with intel OneApi 2022
I need all the input files, please. You can upload them to this forum if you zip all of them.
Did you try to run a different example as well, perhaps from the testsuite or one of the tutorials? This is an important information for me, because it determines whether I need to look for a potential bug in the code or a potential incompatibility with a certain compiler.
Did you try to run a different example as well, perhaps from the testsuite or one of the tutorials? This is an important information for me, because it determines whether I need to look for a potential bug in the code or a potential incompatibility with a certain compiler.
Martin Schlipf
VASP developer